Session 2.5 – Low-Level Design Verification

Module 2: Verification & Validation | Duration: 1 hour

Learning Objectives
  • Verify algorithms, invariants, and edge-case handling in low-level design artifacts.
  • Validate the data structures, storage decisions, and error-handling strategies.
  • Document reasoning, trade-offs, and traceability to requirements.

Low-Level Design Overview

Low-level design (LLD) bridges architecture and code. Typical artifacts include class diagrams, sequence diagrams, pseudo-code, and data schema definitions. Verification ensures:

  • Each design element maps to a requirement or user story.
  • Edge cases and error paths are explicitly described.
  • Complexity, performance, and maintainability constraints are understood.
Evidence to collect: updated class diagrams, pseudo-code, API spec fragments, data dictionary with CRUD operations, and review sign-offs.

Algorithms & Invariants

Algorithm description
Flowcharts or pseudo-code describing core logic and branching.
Pre/Post conditions
Document assumptions entering the algorithm and guarantees upon completion.
Loop invariants
For iterative logic, ensure invariants are stated and provable.
Complexity analysis
Big-O time/space reasoning, best/worst/average cases.
Edge-case checklist:
  • Null/empty inputs and large inputs.
  • Concurrency/race conditions.
  • Precision/overflow (numeric, currency, date).

Data Structures & Storage Decisions

Structure selection
Why list vs map vs tree? Document rationale.
Mutability & ownership
Who can modify data? Are copies or references safe?
Serialization
Wire format (JSON, Avro, protobuf), versioning strategy.
Persistence
Table schema, indexes, partitioning, retention policies.
Verification tip: Build small “paper data” scenarios to walk through operations (insert/update/delete) and confirm invariants.

Review Process

  1. Preparation: Author shares UML/pseudo-code, checklist, complexity notes.
  2. Walkthrough: Reviewers question assumptions, run example inputs, ensure invariants hold.
  3. Static aids: Tools like PlantUML, sequence-diagram diff, schema linters to catch drift.
  4. Outcome: Defect log specifying design gaps, updates to traceability matrix, acceptance criteria for implementation.

Scenario: Order Discount Calculation

Design snippet: Discount engine calculates best offer based on customer tier, coupon, and seasonal campaign. Key data structure is a priority queue of applicable rules.

Review findings
Needed loop invariant to ensure best-priority rule chosen after each iteration; added guard for negative totals.
Traceability
Requirement R-130 → LLD component “DiscountEngine” → pseudo-code “calculateBestDiscount()” → test cases TC-130A/B.
Artifacts updated
Sequence diagram showing API call, data dictionary for rule schema, ADR for priority queue choice vs sorted array.

Summary & Assignment

Low-level design verification keeps implementation grounded in agreed algorithms and data structures. By catching complexity, invariants, and data-handling issues here, we prevent expensive rework later.

Assignment: Pick a module from your project. Produce pseudo-code and data structure notes, run a peer LLD review, and log at least three findings (algorithm edge case, data handling, performance). Update traceability from requirement → LLD → tests.